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X28HC64
DATA Polling (I/O 7 )
The X28HC64 features DATA Polling as a method to indicate
to the host system that the byte write or page write cycle has
completed. DATA Polling allows a simple bit test operation to
determine the status of the X28HC64, eliminating additional
interrupt inputs or external hardware. During the internal
programming cycle, any attempt to read the last byte written
will produce the complement of that data on I/O 7 (i.e. write
data = 0xxx xxxx, read data = 1xxx xxxx). Once the
programming cycle is complete, I/O 7 will reflect true data.
DATA Polling I/O 7
Last
Toggle Bit (I/O 6 )
The X28HC64 also provides another method for determining
when the internal write cycle is complete. During the internal
programming cycle I/O 6 will toggle from HIGH to LOW and
LOW to HIGH on subsequent attempts to read the device.
When the internal cycle is complete the toggling will cease
and the device will be accessible for additional read or write
operations.
WE
Write
CE
OE
V IH
I/O 7
H IGH   Z
V OL
V OH
X28HC64
Ready
A 0 –A 12
An
An
An
An
An
An
An
FIGURE 2. DATA POLLING BUS SEQUENCE
DATA Polling can effectively reduce the time for writing to the
WRITE DATA
WRITES
COMPLETE?
YES
SAVE LAST DATA
AND ADDRESS
READ LAST
ADDRESS
IO 7
NO
NO
X28HC64. The timing diagram in Figure 2 illustrates the
sequence of events on the bus. The software flow diagram in
Figure 3 illustrates one method of implementing the routine.
COMPARE?
YES
READY
FIGURE 3. DATA POLLING SOFTWARE FLOW
4
FN8109.2
August 28, 2009
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